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| (R) STV8164 +5 V, +5 V and Adjustable Triple-Voltage Regulator with Disable and Reset Functions FEATURES s Input Voltage range between 7V and 18V, limited to VOUT + 6.5V s Maximum Available Output Currents greater than 0.8 A s Fixed Precision Output 1 voltage of 5 V 2% (at 10 mA) s Fixed Precision Output 2 voltage of 5 V 2% (at 10 mA) s Programmable Output 3 voltage: 2.5 to 16 V 2% s Output 1 with Reset facility s Outputs 2 and 3 can be disabled by digital input s Short Circuit Protection on each output s Thermal Protection s Low Dropout Voltages Clipwatt11 (Plastic Package) DESCRIPTION The STV8164 is a monolithic triple positive voltage regulator designed to provide two fixed precision output voltages of 5 V and an adjustable voltage for currents up to 0.6 A. The adjustable value of the third output can be fixed from 2.5 V to 16 V. An internal reset circuit generates a reset pulse when the voltage of Output 1 drops below the regulated voltage value. Outputs 2 and 3 can be disabled by a digital input. 11 10 9 8 7 6 5 4 3 2 1 September 2003 PROGRAM DISABLE INPUT3 OUTPUT3 INPUT2 GROUND OUTPUT2 INPUT1 OUTPUT1 DELAY CAPACITOR RESET 1/11 Order Code: STV8164 Short-circuit and thermal protections are included in all versions. STV8164 TABLE OF CONTENTS Chapter 1 Chapter 2 2.1 2.2 2.3 GENERAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Absolute Maximum Ratings ................................................................................................ 4 Thermal Data ...................................................................................................................... 4 Electrical Characteristics ...................................................................................................... 4 Chapter 3 3.1 CIRCUIT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Currents versus Maximum Power Limitation ........................................................................ 6 Chapter 4 Chapter 5 Chapter 6 APPLICATION DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 2/11 STV8164 GENERAL INFORMATION 1 GENERAL INFORMATION Figure 1: STV8164 Block Diagram DELAY CAPACITOR 2 1 Reference RESET INPUT1 4 Regulator 1 3 OUTPUT1 Protections INPUT2 7 Regulator 2 5 OUTPUT2 INPUT3 9 Regulator 3 8 OUTPUT3 DISABLE 10 11 6 GROUND PROGRAM 3/11 ELECTRICAL CHARACTERISTICS STV8164 2 2.1 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter DC Input Voltage at pins INPUT1, INPUT2 and INPUT3 Disable Input Voltage at pin DISABLE Output Voltage at pin RESET Output Currents Power Dissipation Storage Temperature Junction Temperature Symbol VIN VDIS VRST IOUTPUT Pt TSTG TJ Value 20 20 20 Internally Limited Internally Limited -65 to +150 0 to +150 Unit V V V C C 2.2 Thermal Data Parameter Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Maximum Recommended Junction Temperature Operating Free Air Temperature Range Symbol RthJC RthJA TJ TOPER Value 3 101 140 0 to +70 Unit C/W C/W C C 1. Depending on heat sink conditions. 2.3 Electrical Characteristics TAMB = 25 C, VIN1 = 7 V, VIN2 = 7 V and VIN3 = 10 V, unless otherwise specified. Symbol VOUT1 VOUT2 VOUT3 VOUT1 Parameter Output Voltage Output Voltage Output Voltage Output Voltage Test Conditions IOUT1 = 10 mA IOUT2 = 10 mA IOUT3 = 10 mA 7 V < VIN2 < 12 V 5 mA < IOUT2 < 600 mA 7 V < VIN2 < 12 V 5 mA < IOUT2 < 600 mA IOUT1 = 0.6 A IOUT2 = 0.6 A IOUT3 = 0.6 A Min. 4.90 4.90 2.5 4.80 Typ. 5.00 5.00 Max. 5.10 5.10 16 5.20 Unit V V V V VOUT2 VIO1 VIO2 VIO3 Output Voltage Dropout Voltage Dropout Voltage Dropout Voltage 4.80 1 1 1 5.20 1.4 1.4 1.4 V V V V 4/11 STV8164 Symbol VOUT1LI ELECTRICAL CHARACTERISTICS Parameter Line Regulation Test Conditions 7 V < VIN2 < 12 V, IOUT2 = 200 mA 7 V < VIN2 < 12 V, IOUT2 = 200 mA 10 V < VIN3 < 15 V, IOUT3 = 200 mA, VOUT3 = 8 V 5 mA < IO1 < 600 mA 5 mA < IOUT2 < 600 mA 5 mA < IOUT3 < 600 mA, VOUT3 = 8 V IOUT1 = 10 mA Outputs 2 and 3 disabled K = VOUT1 See circuit description. CE = 100 nF See circuit description. IRESET = 5 mA VRESET = 10 V TJ = 0 to 125C Min. Typ. Max. 50 Unit mV VOUT2LI Line Regulation 50 mV VOUT3LI VOUT1LO VOUT2LO VOUT3LO Line Regulation Load Regulation Load Regulation Load Regulation 80 100 100 160 mV mV mV mV IQ VO1RST VRTH tRD VRL IRH KOUT1 KOUT2 KOUT3 IOUT1SC IOUT2SC IOUT3SC VPROG IPROG VDISH VDISL IDIS TJSD TSDH Quiescent Current Reset Threshold Voltage Reset Threshold Hysteresis Reset Pulse Delay Saturation Voltage in Reset Condition Leakage Current in Normal Condition, at RESET pin 2.2 K-0.4 30 K-0.25 75 25 3.0 K-0.10 120 mA V mV ms 0.4 10 V A Output Voltage Thermal Drift V OUT 10 K OUT = -------------------------------T V OUT VIN1 = 7 V VIN2 = 7 V VIN3 = VOUT3 + 2V 6 100 ppm/C Short Circuit Output Current Short Circuit Output Current Short Circuit Output Current Input Voltage at PROGRAM pin Input Current at PROGRAM pin 0.8 0.8 0.8 1.3 1.3 1.3 2 1.8 1.8 1.8 A A A V 5 2 0.8 -100 150 15 2 A V V A C C Voltage High Level at DISABLE pin (Outputs 2 and 3 active) Voltage Low Level at DISABLE pin (Outputs 2 and 3 disabled) Bias Current at DISABLE pin 0 V < VDISABLE < 7 V Junction Temperature for Thermal Shutdown Thermal Shutdown Temperature Hysteresis 5/11 CIRCUIT DESCRIPTION STV8164 3 CIRCUIT DESCRIPTION The STV8164 is a triple-voltage regulator with Reset and Disable functions. The three regulation parts are supplied from a single voltage reference circuit trimmed by zener zapping during EWS testing. Since the supply voltage of this voltage reference is connected to pin INPUT1 (VIN1), the second and third regulators will not work if pin INPUT1 is not supplied. The output stages are designed using a Darlington configuration with a typical dropout voltage of 1.0 V. The adjustable voltage of pin OUTPUT3 is defined by output bridge resistors (R1 and R2). The values of these resistors are calculated to obtain, with the targeted value for pin OUTPUT3, the VPROG voltage (2.0 V) on the median point connected to pin PROGRAM. IMPORTANT: In all applications, all three inputs must be polarized. If Outputs 2 or 3 are not used, the corresponding inputs must be connected to Input 1. The Disable circuit will switch off pins OUTPUT2 and OUTPUT3 if a voltage less than 0.8 V is applied to pin DISABLE. The Reset circuit checks the voltage at pin OUTPUT1. If this voltage drops below VOUT1-0.25 V (4.75 V Typ.), the "a" comparator (Figure 2) rapidly discharges the external capacitor (Ce) and the reset output immediately switches to low. When the voltage at pin OUTPUT1 exceeds VOUT1-0.175 V (4.825 V Typ.), the VCe voltage increases linearly to the reference voltage (VREF = 2.5 V) corresponding to a Reset Pulse Delay (tRD) as shown in Figure 3. C e x 2.5V t R D = ------------------------10A Afterwards, the reset output returns to high. To avoid glitches in the reset output, the second comparator "b" has a large hysteresis (1.9 V). 3.1 Currents versus Maximum Power Limitation The currents provided by the three outputs can reach 1.6 A. However, the power dissipation in the STV8164 must be established so as not to activate the automatic thermal shutdown (TJ = 150 C). It is recommended not to have all three currents at their maximum value simultaneously. For example, if TAMB(MAX.) = 70 C, the maximum power dissipation in the STV8164 will be (with RthJA = 12 C/W): 140C - 70 C ---------------------------------- = 5.8W 12C W This means that the following conditions apply to input voltages and currents: (VIN1 - 5 V) x IIO1 + (VIN2 - 5 V) x IIO2 + (VIN3 - VOUT3) x IIO3 < 5.8 W 6/11 STV8164 CIRCUIT DESCRIPTION Figure 2: Reset Diagram 10 A VREF OUTPUT1 3 REG VREF = 2.5 V b 1 RESET +a 2 Ce VREF + 0.6V Figure 3: Internal Reset Voltage VOUT1 K VO1RST VRTH RESET K = Actual Value of VOUT1 Power On tRD tRD Power Off 7/11 APPLICATION DIAGRAM STV8164 4 APPLICATION DIAGRAM Figure 4: STV8164 Typical Application C1 to C6 = 10 F Ce 1 RESET 0.1 F R1 + R2 V O3 = V PROG x --------------------R1 2 DELAY CAPACITOR OUTPUT1 3 OUTPUT2 5 OUTPUT3 8 VPROG = 2.0 V VOUT1 VOUT2 VOUT3 C4 C5 C6 VIN1 VIN2 VIN3 C1 C2 C3 4 INPUT1 7 INPUT2 9 INPUT3 GROUND DISABLE PROGRAM 11 6 10 R2 R1 8/11 STV8164 PACKAGE MECHANICAL DATA 5 PACKAGE MECHANICAL DATA Figure 5: 11-Pin Plastic Clipwatt Package C A H1 H3 L E F M1 M G1 G D mm Dim. Min. A B C D E F G H1 H2 H3 L L1 L2 L3 M M1 N 10.70 19.85 17.90 14.45 11.00 5.50 2.54 2.54 Number of Pins 11 11.20 0.421 0.49 0.80 1.57 1.70 12.00 18.60 0.781 0.15 1.50 0.55 0.91 1.83 0.019 0.031 0.062 L1 B L2 Inches Max. 3.20 1.05 0.006 0.059 0.002 0.036 0.067 0.480 0.732 0.700 0.569 0.433 0.217 0.100 0.100 0.441 0.072 Typ. Min. Typ. Max. 0.126 0.041 9/11 REVISION HISTORY STV8164 6 REVISION HISTORY Main Changes First Edition New edition. Pin name changed from DISABLE to DISABLE. Reset Threshold values updated. Update of Quiescent Current value in Chapter 2.3: Electrical Characteristics on page 4. Update of reset voltage characteristics. Update of IQ and VO1RST values in Chapter 2.3: Electrical Characteristics on page 4. Modification of Short Circuit Output Current values in Section 2.3: Electrical Characteristics. Output voltages and current further specified on Title page Revision 1.0 1.1 Date 20 June 2001 8 January 2002 1.2 31 January 2002 1.3 1.4 21 May 2002 12 June 2002 10/11 STV8164 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. www.st.com 11/11 |
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